692 type(scalar_field),
dimension(:),
intent(in) :: v_vf
694 real(wp) :: nr_x, nr_y, nr_z, nmag, nmax, ac
695 type(int_bounds_info),
dimension(3) :: id_norm
698# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
700# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
701#if defined(MFC_OpenACC)
702# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
704# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
705#elif defined(MFC_OpenMP)
706# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
708# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
710# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
712# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
714# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
716 do l = idwbuff(3)%beg, idwbuff(3)%end
717 do k = idwbuff(2)%beg, idwbuff(2)%end
718 do j = idwbuff(1)%beg, idwbuff(1)%end
727# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
728#if defined(MFC_OpenACC)
729# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
731# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
732#elif defined(MFC_OpenMP)
733# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
735# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
737# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
740 id_norm(1)%beg = idwbuff(1)%beg + 1; id_norm(1)%end = idwbuff(1)%end - 1
741 id_norm(2)%beg = 0; id_norm(2)%end = 0
742 id_norm(3)%beg = 0; id_norm(3)%end = 0
744 id_norm(2)%beg = idwbuff(2)%beg + 1; id_norm(2)%end = idwbuff(2)%end - 1
747 id_norm(3)%beg = idwbuff(3)%beg + 1; id_norm(3)%end = idwbuff(3)%end - 1
752# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
754# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
755#if defined(MFC_OpenACC)
756# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
758# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
759#elif defined(MFC_OpenMP)
760# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
762# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
764# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
766# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
768# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
770# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
772 do l = id_norm(3)%beg, id_norm(3)%end
773 do k = id_norm(2)%beg, id_norm(2)%end
774 do j = id_norm(1)%beg, id_norm(1)%end
775 ac = v_vf(eqn_idx%adv%beg)%sf(
j,
k,
l)
777 if (ac >= ic_eps .and. ac <= 1._wp - ic_eps)
then
778 nr_x = (v_vf(eqn_idx%adv%beg)%sf(
j + 1,
k,
l) - v_vf(eqn_idx%adv%beg)%sf(
j - 1,
k, &
779 &
l))*(x_cb(
j) - x_cb(
j - 1))/(x_cc(
j + 1) - x_cc(
j - 1))
783 nr_y = (v_vf(eqn_idx%adv%beg)%sf(
j,
k + 1,
l) - v_vf(eqn_idx%adv%beg)%sf(
j,
k - 1, &
784 &
l))*(y_cb(
k) - y_cb(
k - 1))/(y_cc(
k + 1) - y_cc(
k - 1))
789 nr_z = (v_vf(eqn_idx%adv%beg)%sf(
j,
k,
l + 1) - v_vf(eqn_idx%adv%beg)%sf(
j,
k, &
790 &
l - 1))*(z_cb(
l) - z_cb(
l - 1))/(z_cc(
l + 1) - z_cc(
l - 1))
793 nmag = sqrt(nr_x*nr_x + nr_y*nr_y + nr_z*nr_z)
795 if (nmag > verysmall)
then
801 nmax = max(abs(nr_x), abs(nr_y), abs(nr_z))
802 if (abs(nr_x) < mthinc_align_tol*nmax) nr_x = 0._wp
803 if (abs(nr_y) < mthinc_align_tol*nmax) nr_y = 0._wp
804 if (abs(nr_z) < mthinc_align_tol*nmax) nr_z = 0._wp
805 nmag = sqrt(nr_x*nr_x + nr_y*nr_y + nr_z*nr_z)
806 if (nmag > verysmall)
then
823# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
824#if defined(MFC_OpenACC)
825# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
827# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
828#elif defined(MFC_OpenMP)
829# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
831# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
833# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
842 real(wp),
dimension(idwbuff(1)%beg:,idwbuff(2)%beg:,idwbuff(3)%beg:,1:),
intent(in) :: v_rs_ws
843 real(wp),
dimension(idwbuff(1)%beg:,idwbuff(2)%beg:,idwbuff(3)%beg:,1:),
intent(inout) :: vl_rs_vf_x, vr_rs_vf_x
844 integer,
intent(in) :: recon_dir
845 type(int_bounds_info),
intent(in) :: is1_d, is2_d, is3_d
847 real(wp) :: acl, acr, ac, athinc, qmin, qmax, a, b, c
848 real(wp) :: sgn, moncon, beta_eff
849 real(wp) :: nh1, nh2, nh3, d_local, rho1, rho2
850 real(wp) :: rho_b, rho_e
852# 311 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
853# 312 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
854# 313 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
855 if (recon_dir == 1)
then
857# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
859# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
860#if defined(MFC_OpenACC)
861# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
863# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
864#elif defined(MFC_OpenMP)
865# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
867# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
869# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
871# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
873# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
875# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
877# 316 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
878 do l = is3_d%beg, is3_d%end
879 do k = is2_d%beg, is2_d%end
880 do j = is1_d%beg, is1_d%end
881 acl = v_rs_ws(
j - 1,
k,
l, eqn_idx%adv%beg)
882 ac = v_rs_ws(
j,
k,
l, eqn_idx%adv%beg)
883 acr = v_rs_ws(
j + 1,
k,
l, eqn_idx%adv%beg)
885 if (ac >= ic_eps .and. ac <= 1._wp - ic_eps)
then
886 if (int_comp == int_comp_mthinc .and. n > 0)
then
895 if (nh1*nh1 + nh2*nh2 + nh3*nh3 > 5e-1_wp)
then
896 rho1 = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
897 rho2 = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
902 if (athinc < ic_eps) athinc = ic_eps
903 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
904 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
905 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
906 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
907 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
912 if (athinc < ic_eps) athinc = ic_eps
913 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
914 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
915 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
916 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
917 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
920 moncon = (acr - ac)*(ac - acl)
922 if (moncon > moncon_cutoff)
then
923 if (acr - acl > 0._wp)
then
932 qmax = max(acr, acl) - qmin
934 c = (ac - qmin + sgm_eps)/(qmax + sgm_eps)
935 b = exp(sgn*beta_eff*(2._wp*c - 1._wp))
936 a = (b/cosh(beta_eff) - 1._wp)/tanh(beta_eff)
938 rho_b = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
939 rho_e = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
942 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*a)
943 if (athinc < ic_eps) athinc = ic_eps
944 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
945 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
946 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
947 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
948 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
951 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*(tanh(beta_eff) + a)/(1._wp + a*tanh(beta_eff)))
952 if (athinc < ic_eps) athinc = ic_eps
953 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
954 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
955 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
956 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
957 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
965# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
966#if defined(MFC_OpenACC)
967# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
969# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
970#elif defined(MFC_OpenMP)
971# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
973# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
975# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
978# 311 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
979# 312 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
980# 313 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
981 if (recon_dir == 2)
then
983# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
985# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
986#if defined(MFC_OpenACC)
987# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
989# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
990#elif defined(MFC_OpenMP)
991# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
993# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
995# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
997# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
999# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1001# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1003# 316 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1004 do l = is3_d%beg, is3_d%end
1005 do k = is1_d%beg, is1_d%end
1006 do j = is2_d%beg, is2_d%end
1007 acl = v_rs_ws(
j,
k - 1,
l, eqn_idx%adv%beg)
1008 ac = v_rs_ws(
j,
k,
l, eqn_idx%adv%beg)
1009 acr = v_rs_ws(
j,
k + 1,
l, eqn_idx%adv%beg)
1011 if (ac >= ic_eps .and. ac <= 1._wp - ic_eps)
then
1012 if (int_comp == int_comp_mthinc .and. n > 0)
then
1021 if (nh1*nh1 + nh2*nh2 + nh3*nh3 > 5e-1_wp)
then
1022 rho1 = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
1023 rho2 = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
1028 if (athinc < ic_eps) athinc = ic_eps
1029 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1030 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
1031 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
1032 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1033 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1038 if (athinc < ic_eps) athinc = ic_eps
1039 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1040 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
1041 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
1042 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1043 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1046 moncon = (acr - ac)*(ac - acl)
1048 if (moncon > moncon_cutoff)
then
1049 if (acr - acl > 0._wp)
then
1057 qmin = min(acr, acl)
1058 qmax = max(acr, acl) - qmin
1060 c = (ac - qmin + sgm_eps)/(qmax + sgm_eps)
1061 b = exp(sgn*beta_eff*(2._wp*c - 1._wp))
1062 a = (b/cosh(beta_eff) - 1._wp)/tanh(beta_eff)
1064 rho_b = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
1065 rho_e = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
1068 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*a)
1069 if (athinc < ic_eps) athinc = ic_eps
1070 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1071 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
1072 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
1073 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1074 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1077 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*(tanh(beta_eff) + a)/(1._wp + a*tanh(beta_eff)))
1078 if (athinc < ic_eps) athinc = ic_eps
1079 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1080 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
1081 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
1082 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1083 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1091# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1092#if defined(MFC_OpenACC)
1093# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1095# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1096#elif defined(MFC_OpenMP)
1097# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1099# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1101# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1104# 311 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1105# 312 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1106# 313 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1107 if (recon_dir == 3)
then
1109# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1111# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1112#if defined(MFC_OpenACC)
1113# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1115# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1116#elif defined(MFC_OpenMP)
1117# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1119# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1121# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1123# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1125# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1127# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1129# 316 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1130 do l = is1_d%beg, is1_d%end
1131 do k = is2_d%beg, is2_d%end
1132 do j = is3_d%beg, is3_d%end
1133 acl = v_rs_ws(
j,
k,
l - 1, eqn_idx%adv%beg)
1134 ac = v_rs_ws(
j,
k,
l, eqn_idx%adv%beg)
1135 acr = v_rs_ws(
j,
k,
l + 1, eqn_idx%adv%beg)
1137 if (ac >= ic_eps .and. ac <= 1._wp - ic_eps)
then
1138 if (int_comp == int_comp_mthinc .and. n > 0)
then
1147 if (nh1*nh1 + nh2*nh2 + nh3*nh3 > 5e-1_wp)
then
1148 rho1 = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
1149 rho2 = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
1154 if (athinc < ic_eps) athinc = ic_eps
1155 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1156 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
1157 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
1158 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1159 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1164 if (athinc < ic_eps) athinc = ic_eps
1165 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1166 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
1167 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
1168 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1169 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1172 moncon = (acr - ac)*(ac - acl)
1174 if (moncon > moncon_cutoff)
then
1175 if (acr - acl > 0._wp)
then
1183 qmin = min(acr, acl)
1184 qmax = max(acr, acl) - qmin
1186 c = (ac - qmin + sgm_eps)/(qmax + sgm_eps)
1187 b = exp(sgn*beta_eff*(2._wp*c - 1._wp))
1188 a = (b/cosh(beta_eff) - 1._wp)/tanh(beta_eff)
1190 rho_b = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
1191 rho_e = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
1194 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*a)
1195 if (athinc < ic_eps) athinc = ic_eps
1196 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1197 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
1198 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
1199 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1200 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1203 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*(tanh(beta_eff) + a)/(1._wp + a*tanh(beta_eff)))
1204 if (athinc < ic_eps) athinc = ic_eps
1205 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1206 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
1207 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
1208 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1209 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1217# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1218#if defined(MFC_OpenACC)
1219# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1221# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1222#elif defined(MFC_OpenMP)
1223# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1225# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1227# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1230# 405 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"