704 type(scalar_field),
dimension(:),
intent(in) :: v_vf
706 real(wp) :: nr_x, nr_y, nr_z, nmag, nmax, ac
707 type(int_bounds_info),
dimension(3) :: id_norm
710# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
712# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
713#if defined(MFC_OpenACC)
714# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
716# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
717#elif defined(MFC_OpenMP)
718# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
720# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
722# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
724# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
726# 214 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
728 do l = idwbuff(3)%beg, idwbuff(3)%end
729 do k = idwbuff(2)%beg, idwbuff(2)%end
730 do j = idwbuff(1)%beg, idwbuff(1)%end
739# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
740#if defined(MFC_OpenACC)
741# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
743# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
744#elif defined(MFC_OpenMP)
745# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
747# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
749# 225 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
752 id_norm(1)%beg = idwbuff(1)%beg + 1; id_norm(1)%end = idwbuff(1)%end - 1
753 id_norm(2)%beg = 0; id_norm(2)%end = 0
754 id_norm(3)%beg = 0; id_norm(3)%end = 0
756 id_norm(2)%beg = idwbuff(2)%beg + 1; id_norm(2)%end = idwbuff(2)%end - 1
759 id_norm(3)%beg = idwbuff(3)%beg + 1; id_norm(3)%end = idwbuff(3)%end - 1
764# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
766# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
767#if defined(MFC_OpenACC)
768# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
770# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
771#elif defined(MFC_OpenMP)
772# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
774# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
776# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
778# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
780# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
782# 238 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
784 do l = id_norm(3)%beg, id_norm(3)%end
785 do k = id_norm(2)%beg, id_norm(2)%end
786 do j = id_norm(1)%beg, id_norm(1)%end
787 ac = v_vf(eqn_idx%adv%beg)%sf(
j,
k,
l)
789 if (ac >= ic_eps .and. ac <= 1._wp - ic_eps)
then
790 nr_x = (v_vf(eqn_idx%adv%beg)%sf(
j + 1,
k,
l) - v_vf(eqn_idx%adv%beg)%sf(
j - 1,
k, &
791 &
l))*(x_cb(
j) - x_cb(
j - 1))/(x_cc(
j + 1) - x_cc(
j - 1))
795 nr_y = (v_vf(eqn_idx%adv%beg)%sf(
j,
k + 1,
l) - v_vf(eqn_idx%adv%beg)%sf(
j,
k - 1, &
796 &
l))*(y_cb(
k) - y_cb(
k - 1))/(y_cc(
k + 1) - y_cc(
k - 1))
801 nr_z = (v_vf(eqn_idx%adv%beg)%sf(
j,
k,
l + 1) - v_vf(eqn_idx%adv%beg)%sf(
j,
k, &
802 &
l - 1))*(z_cb(
l) - z_cb(
l - 1))/(z_cc(
l + 1) - z_cc(
l - 1))
805 nmag = sqrt(nr_x*nr_x + nr_y*nr_y + nr_z*nr_z)
807 if (nmag > verysmall)
then
813 nmax = max(abs(nr_x), abs(nr_y), abs(nr_z))
814 if (abs(nr_x) < mthinc_align_tol*nmax) nr_x = 0._wp
815 if (abs(nr_y) < mthinc_align_tol*nmax) nr_y = 0._wp
816 if (abs(nr_z) < mthinc_align_tol*nmax) nr_z = 0._wp
817 nmag = sqrt(nr_x*nr_x + nr_y*nr_y + nr_z*nr_z)
818 if (nmag > verysmall)
then
835# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
836#if defined(MFC_OpenACC)
837# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
839# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
840#elif defined(MFC_OpenMP)
841# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
843# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
845# 289 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
854 real(wp),
dimension(idwbuff(1)%beg:,idwbuff(2)%beg:,idwbuff(3)%beg:,1:),
intent(in) :: v_rs_ws
855 real(wp),
dimension(idwbuff(1)%beg:,idwbuff(2)%beg:,idwbuff(3)%beg:,1:),
intent(inout) :: vl_rs_vf_x, vr_rs_vf_x
856 integer,
intent(in) :: recon_dir
857 type(int_bounds_info),
intent(in) :: is1_d, is2_d, is3_d
859 real(wp) :: acl, acr, ac, athinc, qmin, qmax, a, b, c
860 real(wp) :: sgn, moncon, beta_eff
861 real(wp) :: nh1, nh2, nh3, d_local, rho1, rho2
862 real(wp) :: rho_b, rho_e
864# 311 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
865# 312 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
866# 313 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
867 if (recon_dir == 1)
then
869# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
871# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
872#if defined(MFC_OpenACC)
873# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
875# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
876#elif defined(MFC_OpenMP)
877# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
879# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
881# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
883# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
885# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
887# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
889# 316 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
890 do l = is3_d%beg, is3_d%end
891 do k = is2_d%beg, is2_d%end
892 do j = is1_d%beg, is1_d%end
893 acl = v_rs_ws(
j - 1,
k,
l, eqn_idx%adv%beg)
894 ac = v_rs_ws(
j,
k,
l, eqn_idx%adv%beg)
895 acr = v_rs_ws(
j + 1,
k,
l, eqn_idx%adv%beg)
897 if (ac >= ic_eps .and. ac <= 1._wp - ic_eps)
then
898 if (int_comp == int_comp_mthinc .and. n > 0)
then
907 if (nh1*nh1 + nh2*nh2 + nh3*nh3 > 5e-1_wp)
then
908 rho1 = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
909 rho2 = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
914 if (athinc < ic_eps) athinc = ic_eps
915 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
916 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
917 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
918 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
919 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
924 if (athinc < ic_eps) athinc = ic_eps
925 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
926 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
927 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
928 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
929 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
932 moncon = (acr - ac)*(ac - acl)
934 if (moncon > moncon_cutoff)
then
935 if (acr - acl > 0._wp)
then
944 qmax = max(acr, acl) - qmin
946 c = (ac - qmin + sgm_eps)/(qmax + sgm_eps)
947 b = exp(sgn*beta_eff*(2._wp*c - 1._wp))
948 a = (b/cosh(beta_eff) - 1._wp)/tanh(beta_eff)
950 rho_b = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
951 rho_e = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
954 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*a)
955 if (athinc < ic_eps) athinc = ic_eps
956 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
957 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
958 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
959 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
960 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
963 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*(tanh(beta_eff) + a)/(1._wp + a*tanh(beta_eff)))
964 if (athinc < ic_eps) athinc = ic_eps
965 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
966 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
967 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
968 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
969 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
977# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
978#if defined(MFC_OpenACC)
979# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
981# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
982#elif defined(MFC_OpenMP)
983# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
985# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
987# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
990# 311 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
991# 312 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
992# 313 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
993 if (recon_dir == 2)
then
995# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
997# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
998#if defined(MFC_OpenACC)
999# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1001# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1002#elif defined(MFC_OpenMP)
1003# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1005# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1007# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1009# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1011# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1013# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1015# 316 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1016 do l = is3_d%beg, is3_d%end
1017 do k = is1_d%beg, is1_d%end
1018 do j = is2_d%beg, is2_d%end
1019 acl = v_rs_ws(
j,
k - 1,
l, eqn_idx%adv%beg)
1020 ac = v_rs_ws(
j,
k,
l, eqn_idx%adv%beg)
1021 acr = v_rs_ws(
j,
k + 1,
l, eqn_idx%adv%beg)
1023 if (ac >= ic_eps .and. ac <= 1._wp - ic_eps)
then
1024 if (int_comp == int_comp_mthinc .and. n > 0)
then
1033 if (nh1*nh1 + nh2*nh2 + nh3*nh3 > 5e-1_wp)
then
1034 rho1 = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
1035 rho2 = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
1040 if (athinc < ic_eps) athinc = ic_eps
1041 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1042 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
1043 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
1044 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1045 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1050 if (athinc < ic_eps) athinc = ic_eps
1051 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1052 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
1053 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
1054 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1055 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1058 moncon = (acr - ac)*(ac - acl)
1060 if (moncon > moncon_cutoff)
then
1061 if (acr - acl > 0._wp)
then
1069 qmin = min(acr, acl)
1070 qmax = max(acr, acl) - qmin
1072 c = (ac - qmin + sgm_eps)/(qmax + sgm_eps)
1073 b = exp(sgn*beta_eff*(2._wp*c - 1._wp))
1074 a = (b/cosh(beta_eff) - 1._wp)/tanh(beta_eff)
1076 rho_b = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
1077 rho_e = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
1080 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*a)
1081 if (athinc < ic_eps) athinc = ic_eps
1082 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1083 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
1084 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
1085 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1086 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1089 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*(tanh(beta_eff) + a)/(1._wp + a*tanh(beta_eff)))
1090 if (athinc < ic_eps) athinc = ic_eps
1091 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1092 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
1093 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
1094 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1095 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1103# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1104#if defined(MFC_OpenACC)
1105# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1107# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1108#elif defined(MFC_OpenMP)
1109# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1111# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1113# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1116# 311 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1117# 312 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1118# 313 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1119 if (recon_dir == 3)
then
1121# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1123# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1124#if defined(MFC_OpenACC)
1125# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1127# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1128#elif defined(MFC_OpenMP)
1129# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1131# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1133# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1135# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1137# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1139# 314 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1141# 316 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1142 do l = is1_d%beg, is1_d%end
1143 do k = is2_d%beg, is2_d%end
1144 do j = is3_d%beg, is3_d%end
1145 acl = v_rs_ws(
j,
k,
l - 1, eqn_idx%adv%beg)
1146 ac = v_rs_ws(
j,
k,
l, eqn_idx%adv%beg)
1147 acr = v_rs_ws(
j,
k,
l + 1, eqn_idx%adv%beg)
1149 if (ac >= ic_eps .and. ac <= 1._wp - ic_eps)
then
1150 if (int_comp == int_comp_mthinc .and. n > 0)
then
1159 if (nh1*nh1 + nh2*nh2 + nh3*nh3 > 5e-1_wp)
then
1160 rho1 = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
1161 rho2 = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
1166 if (athinc < ic_eps) athinc = ic_eps
1167 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1168 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
1169 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
1170 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1171 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1176 if (athinc < ic_eps) athinc = ic_eps
1177 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1178 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho1*athinc
1179 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho2*(1._wp - athinc)
1180 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1181 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1184 moncon = (acr - ac)*(ac - acl)
1186 if (moncon > moncon_cutoff)
then
1187 if (acr - acl > 0._wp)
then
1195 qmin = min(acr, acl)
1196 qmax = max(acr, acl) - qmin
1198 c = (ac - qmin + sgm_eps)/(qmax + sgm_eps)
1199 b = exp(sgn*beta_eff*(2._wp*c - 1._wp))
1200 a = (b/cosh(beta_eff) - 1._wp)/tanh(beta_eff)
1202 rho_b = v_rs_ws(
j,
k,
l, eqn_idx%cont%beg)/ac
1203 rho_e = v_rs_ws(
j,
k,
l, eqn_idx%cont%end)/(1._wp - ac)
1206 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*a)
1207 if (athinc < ic_eps) athinc = ic_eps
1208 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1209 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
1210 vl_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
1211 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1212 vl_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1215 athinc = qmin + 5e-1_wp*qmax*(1._wp + sgn*(tanh(beta_eff) + a)/(1._wp + a*tanh(beta_eff)))
1216 if (athinc < ic_eps) athinc = ic_eps
1217 if (athinc > 1._wp - ic_eps) athinc = 1._wp - ic_eps
1218 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%beg) = rho_b*athinc
1219 vr_rs_vf_x(
j,
k,
l, eqn_idx%cont%end) = rho_e*(1._wp - athinc)
1220 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%beg) = athinc
1221 vr_rs_vf_x(
j,
k,
l, eqn_idx%adv%end) = 1._wp - athinc
1229# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1230#if defined(MFC_OpenACC)
1231# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1233# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1234#elif defined(MFC_OpenMP)
1235# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1237# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1239# 402 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"
1242# 405 "/home/runner/work/MFC/MFC/src/simulation/m_thinc.fpp"